OMM Software Innovation Pvt Ltd.

"OMM" Reflection of absolute reality....

OMM Software Innovation Pvt Ltd

"OMM" Reflection of absolute reality....

OMM Software Innovation Pvt Ltd

"OMM" Reflection of absolute reality....

OMM Software Innovation Pvt Ltd

"OMM" Reflection of absolute reality....

OMM Software Innovation Pvt Ltd

"OMM" Reflection of absolute reality....

Showing posts with label ARM. Show all posts
Showing posts with label ARM. Show all posts

Sunday, 22 December 2013

INTRODUCTION TO LOAD / STORE ARCHITECTURE OF ARM

INTRODUCTION TO  LOAD / STORE ARCHITECTURE OF ARM
*        The ARM is a Load / Store Architecture:
•         Does not support memory to memory data processing operations.
•         Must move data values into registers before using them.
*        This might sound inefficient, but in practice isn’t:
•         Load data values from memory into registers.
•         Process data in registers using a number of data processing instructions which are not slowed down by memory access.
•         Store results from registers out to memory.
*        The ARM has three sets of instructions which interact with main memory. These are:
•         Single register data transfer (LDR / STR).
•         Block data transfer (LDM/STM).
•         Single Data Swap (SWP).



Saturday, 21 December 2013

KNOWING THE NOMENCLATURE OF ARM FAMILY

KNOWING THE NOMENCLATURE OF ARM FAMILY


n      ARM-XYZ  TDMI  EJF- S
X -  series of ARM processor
Y -  Support of CACHE MEMORY
Z – Support of Memory management and Memory protection Unit.

T – Thumb architecture Support of 16 bit instruction.
D – Debugger support
M – Fast Multiplier
I – Embedded ICE - In Circuit Emulator

E – Embedded Trace Macro-cell.
J – Jazelle Instruction set / Java byte code, support to java programs
F – Floating point co-processor


S – Synthesizable version means the ARM is a set of software instruction engine that can be compiled on a suitable compiler.

Saturday, 14 December 2013

INTRODUCTION OF UNIVERSAL ASYNCHRONOUS RECEIVER/TRANSMITTER(UART)

INTRODUCTION OF UNIVERSAL ASYNCHRONOUS RECEIVER/TRANSMITTER(UART)

-- It is a piece of computer n/w,that translate data between parallel & serial forms.
-- UARTS are commonly used in conjuction with communication standards such as RS-232,
    RS-422,RS-485.
-- A UART is usually an individuals integrated circuit used for serial communication over a 
    computer or peripheral device serial port.UART is commonly included in microcontroller.
-- UART is a Asyncronous & it is full duplex.
  


Friday, 13 December 2013

VECHILE STATUS CONTROL IN MODERN TIME

VECHILE STATUS CONTROL

In day to days life ,we forgot to check the status of our vechile and we move outside and if vechile is stopped down than we understand what fault occurs in vechile.
So to over come this problem,what we do is that,we used to find the status of the component like,brake,accelator,light,speed,location of the vechile etc..by using Global Positioning of Satellite system,GSM & CAN.


Wednesday, 11 December 2013

Some Basic Facts of ARM

                         ........................................Some basic facts of ARM........................................

n  ARM was founded by formerly known as ACORN RISC Machine founded by ACORN COMPUTERS LTD in 1983-85, later named as Advanced Risc Machine in 1990.
n  ARM is basically a general purpose 32 bit processor.
n  ARM is incorporated with the 32 bit controllers manufactured by Philips with the banner name LPC series controllers.
n  ARM family started with the series number from ARM 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13.
n  The series till ARM 6 were basically 16 bit microcontrollers.
n  ARM 7 was the first 32 bit controller given by ARM.

The even number of series was reserved for the company’s R&D purpose and the odd version was released to the market for commercial purpose. ARM 10 is the only even series that was released to the market

Basic Introduction of CISC & RISC for Embedded Engineers

Sr.No

1
CISC

Founded in 1970’s
RISC

Founded in late 1980’s
2
Needed more number of clock cycles
Designed to work with less or limited number of clock cycles. Usually 1 clock.
3
These had slow memories coupled to processor built using many simple IC’s.
Could be coupled with faster memories
4
The processor was controlled by microcode ROM’s, which were faster than processor.
The processor itself was faster and interfacing other interface did not much affect the overall speed.
5
Code can execute X86 machines code
Code cannot execute code for X86
6
Older CISC did not support pipeline
Supports pipelining
7
Variable Instruction length
Fixed instruction length.
8
Allows value in memory to be used as operands for data processing
Can work only if data is in registers and not in memory directly.(LOAD & STORE )
9
Have very good code density
Have very poor code density.
10
Hardware complexity is less
Hardware complexity is more.