INTRODUCTION TO LOAD / STORE ARCHITECTURE OF ARM
*
The ARM is a Load / Store Architecture:
•
Does not
support memory to memory data processing operations.
•
Must
move data values into registers before using them.
*
This
might sound inefficient, but in practice isn’t:
•
Load
data values from memory into registers.
•
Process
data in registers using a number of data processing instructions which are not
slowed down by memory access.
•
Store
results from registers out to memory.
*
The ARM
has three sets of instructions which interact with main memory. These are:
•
Single
register data transfer (LDR / STR).
•
Block
data transfer (LDM/STM).
•
Single
Data Swap (SWP).
